Texas Instruments TMS320F2805x Piccolo™ Microcontrollers
Texas Instruments TMS320F2805x Piccolo™ Microcontrollers provide the power of the C28x™ core and CLA coupled with highly integrated control peripherals in low pin-count devices. TMS320F2805x is code compatible with previous C28x-based code and offers a high level of analog integration. An internal voltage regulator enables single rail operation. The TMS320F2805x family also includes analog comparators with internal 6-bit references that can be routed directly to control the PWM outputs. Optimized for low overhead and latency, the ADC interface features an ADC that converts from 0 to 3.3V fixed full-scale range and supports ratio-metric VREFHI/VREFLO references. The Analog Front End (AFE) includes up to seven comparators with up to three integrated DACs, one VREFOUT-buffered DAC, up to four PGAs, and up to four digital filters. The PGAs can amplify the input signal in three discrete gain modes.
Features
- High-Efficiency 32-Bit CPU (TMS320C28x)
- 60MHz (16.67ns Cycle Time)
- 16x16 and 32x32 MAC Operations
- 16x16 Dual MAC
- Harvard Bus Architecture
- Atomic Operations
- Fast Interrupt Response and Processing
- Unified Memory Programming Model
- Code-Efficient (in C/C++ and Assembly)
- Programmable Control Law Accelerator (CLA)
- 32-Bit Floating-Point Math Accelerator
- Executes Code Independently of the Main CPU
- Dual-Zone Security Module
- Endianness: Little Endian
- Low Device and System Cost
- Single 3.3V Supply
- No Power Sequencing Requirement
- Integrated Power-on Reset and Brown-out Reset
- Low Power
- No Analog Support Pins
- Clocking
- Two Internal Zero-Pin Oscillators
- On-Chip Crystal Oscillator and External Clock Input
- Watchdog Timer Module
- Missing Clock Detection Circuitry
- Up to 42 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins With Input Filtering
- JTAG Boundary Scan Support
- IEEE Standard 1149.1-1990 Standard Test Access Port and Boundary Scan Architecture
- Peripheral Interrupt Expansion (PIE) Block That Supports All Peripheral Interrupts
- Three 32-Bit CPU Timers
- Independent 16-Bit Timer in Each ePWM Module
- On-Chip Memory
- Flash, SARAM, Message RAM, OTP, CLA Data ROM, Boot ROM, Secure ROM Available
- 128-Bit Security Key and Lock
- Protects Secure Memory Blocks
- Prevents Firmware Reverse Engineering
- Serial Port Peripherals
- Three Serial Communications Interface (SCI) (Universal Asynchronous Receiver/Transmitter [UART]) Modules
- One Serial Peripheral Inteface (SPI) Module
- One Inter-Integrated-Circuit (I2C) Bus
- One Enhanced Controller Area Network (eCAN) Bus
- Enhanced Control Peripherals
- Enhanced Pulse Width Modulator (ePWM)
- Enhanced Capture (eCAP) Module
- Enhanced Quadrature Encoder Pulse (eQEP) Module
- Analog Peripherals
- One 12-Bit Analog-to-Digital Converter (ADC)
- One On-Chip Temperature Sensor for Oscillator Compensation
- Up to Seven Comparators With up to Three Integrated Digital-to-Analog Converters (DACs)
- One Buffered Reference DAC
- Up to Four Programmable Gain Amplifiers (PGAs)
- Up to Four Digital Filters
- Advanced Emulation Features
- Analysis and Breakpoint Functions
- Real-Time Debug via Hardware
- 80-Pin PN Low-Profile Quad Flatpack (LQFP)
Applications
- White Goods
- Solar Microinverters and Converters
- Sewing and Textile Machines
- AC/DC Inverters
- General Motor Control
Functional Block Diagram
Related Product
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Część wysoce zintegrowanych rozwiązań DSP do wymagających zastosowań sterowania.
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Opublikowano: 2014-08-28
| Zaktualizowano: 2024-10-10