Texas Instruments SN74LV8T373/Q1 Translating D-Type Flip-Flops

Texas Instruments SN74LV8T373/SN74LV8T373-Q1 Translating Octal D-Type Flip-Flops include eight D-type latches with all channels sharing a Latch Enable (LE) input and Output Enable (OE) input. The input circuit uses a reduced threshold design to enable voltage level up-translation when the supply voltage (VCC) is higher than the input voltage. The output is always referenced to VCC, supporting CMOS logic levels of 1.8V, 2.5V, 3.3V, and 5V. The SN74LV8T373/SN74LV8T373-Q1 flip-flops operate at a 1.65V to 5.5V wide supply voltage range, 5.5V-tolerant input pins, and support standard function pinout. These flip-flops are available in a wettable flank QFN package with Latch-up performance exceeding 250mA per JESD 17. The SN74LV8T373-Q1 devices are AEC-Q100 qualified for automotive applications. Typical applications include parallel data storage and a digital bus buffer.

Features

  • SN74LV8T373-Q1:
    • AEC-Q100 qualified for automotive applications:
      • -40°C to 125°C device temperature grade 1
      • Device HBM ESD classification level 2
      • Device CDM ESD classification level C4B
  • Single-supply voltage translator:
    • Up translation:
      • 1.2V to 1.8V
      • 1.5V to 2.5V
      • 1.8V to 3.3V
      • 3.3V to 5V
    • Down translation:
      • 5V, 3.3V, and 2.5V to 1.8V
      • 5V and 3.3V to 2.5V
      • 5V to 3.3V
  • Up to 150Mbps with 5V or 3.3V VCC
  • Available in a wettable flank QFN package
  • 1.65V to 5.5V wide operating supply voltage range
  • 5.5V-tolerant input pins
  • Supports standard function pinout
  • Latch-up performance exceeds 250mA per JESD 17

Applications

  • Parallel data storage
  • Digital bus buffer

Functional Block Diagram

Block Diagram - Texas Instruments SN74LV8T373/Q1 Translating D-Type Flip-Flops

Electrical Placement of Clamping Diodes for Each Input and Output

Texas Instruments SN74LV8T373/Q1 Translating D-Type Flip-Flops
Opublikowano: 2025-09-29 | Zaktualizowano: 2025-11-17