Texas Instruments LMK04816 Low-Noise Clock Jitter Cleaner

Texas Instruments LMK04816 Low-Noise Clock Jitter Cleaner is a high-performance clock conditioner that includes superior clock jitter cleaning, generation, and distribution with advanced features to meet next-generation system requirements. The dual loop PLLatinum™ architecture enables 111fs RMS jitter (12kHz to 20MHz) using a low noise VCXO module or sub-200fs RMS jitter (12kHz to 20MHz) using a low-cost external crystal and varactor diode. The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage-controlled oscillator (VCO). The first PLL (PLL1) provides a low-noise jitter cleaner function. The while the second PLL (PLL2) performs the clock generation.

Features

Ultra-Low RMS Jitter performance
- 100fs RMS Jitter (12kHz to 20MHz)
- 123fs RMS Jitter (100Hz to 20MHz)
Dual Loop PLLatinum™ PLL architecture
- PLL1
  - An integrated low-noise crystal oscillator circuit
  - Holdover mode when input clocks are lost
  - Automatic or manual triggering/recovery
- PLL2
  - Normalized [1Hz] PLL noise floor of -227dBc/Hz
  - Phase detector rate up to 155MHz
  - OSCin frequency-doubler
  - Integrated low-noise VCO
3 Redundant input clocks with LOS
- Automatic and manual switch-over modes
50% duty cycle output divides, 1 to 1045 (even and odd)
LVPECL, LVDS, or LVCMOS programmable outputs

Precision digital delay, fixed or dynamically adjustable
25ps step analog delay control, up to 575ps.
1/2 clock distribution period step digital delay, up to 522 steps
13 differential outputs with up to 26 single-ended
- Up to 5 VCXO/Crystal buffered outputs
Clock rates of up to 2600MHz
0 delay mode
Three default clock outputs at power-up
Multi-mode: dual PLL, single PLL, and clock distribution
-40 to 85°C Industrial temperature range
3.15V to 3.45V operation
Package: 64-Pin WQFN (9mm x 9mm x 0.8mm)