STMicroelectronics STNRGxxxA Digital Controllers
STMicroelectronics STNRGxxxA Digital Controllers are part of the STNRG family of digital devices designed for advanced power conversion applications. STMicroelectronics STNRG improve the design of the successful STLUX™ family, now integrated in a wide range of LED driver architectures. They support industrial power conversion applications like PFC+LLC, interleaved LC DC/DC, interleaved PFC for smart power supplies and the full bridge for pilot line drivers for electric vehicles.
Features
- Up to 6 programmable PWM generators (SMED - "State Machine Event Driven")
- 10ns event detection and reaction
- 1.3ns maximum PWM resolution
- Single, coupled and two coupled operational modes
- Up to 3 internal/external events per SMED
- 4 analog comparators
- 4 internal 4-bit references
- Up to 4 external references
- Less than 50ns propagation time
- Continuous comparison cycle
- Configurable hysteresis voltage levels
- ADCs (up to 8 channels)
- 10-bit precision, with operational amplifier to extend resolution to 12-bit equivalent
- Sequencer functionality
- 1M input impedance
- x1 and x4 configurable gain value
- Memories
- Flash and E2PROM with read while write (RWW) and error correction code (ECC)
- 32Kbytes Flash program memory; data retention 15 years at +85°C after 10 kcycles at +25°C
- 1Kbyte data memory true data E2PROM; data retention: 15 years at 85°C after 100 kcycles at +85°C
- 6Kbytes RAM
- -40°C to +105°C operating temperature range
- Integrated microcontroller
- Advanced STM8® core with Harvard architecture and 3-stage pipeline
- 16MHz maximum fCPU
- Clock management
- Internal 96MHz PLL
- Low power oscillator circuit for external crystal resonator or direct clock input
- Internal, user-trimmable 16MHz RC and low power 153.6kHz RC oscillators
- Clock security system with clock monitor
- Basic peripherals
- System, auxiliary and basic timers
- IWDG/WWDG watchdog, AWU, ITC
- Reset and supply management
- Multiple low power modes (wait, slow, auto-wakeup, Halt) with user definable clock gating
- Low consumption power-on and power-down reset
- I/O
- Multifunction bidirectional GPIO with highly robust design, immune against current injection
- Fast digital input DIGIN, with configurable pull-up
- Communication interfaces
- UART asynchronous with SW flow control and bootloader support
- I2C master/slave fast-slow speed rate
System Architecture
Associated Products
STMicroelectronics STNRG011 Digital Combo Multi-Mode PFC Controller
Embodies a PFC controller, LLC resonant half-bridge, startup generator, and digital engine.
Associated Board
STMicroelectronics EVLSTRNG Evaluation Boards
Intended for evaluating the STNRG388A digital controller in off-line power conversion applications.
Opublikowano: 2015-06-09
| Zaktualizowano: 2022-03-11