Renesas Electronics RX700 32-bit Microcontrollers
Renesas Electronics RX700 32-bit Microcontrollers are the flagship of the RX family. The RX700 MCUs combines up to 4MB of flash memory that can operate at 120MHz. These 32-bit MCUs employ an on-chip Advanced Fetch Unit (AFU) that delivers excellent real-time performance even at the maximum operating frequency of 240MHz. The RX700 MCUs come with 32KB Error Checking and Correcting Random Access Memory (ECCRAM). These 32-bit MCUs also feature 512KB of on-chip SRAM with a parity function that helps minimize malfunctions due to software errors in the SRAM.
The RX700 MCUs incorporate hardware encryption functions such as AES, DES, SHA, and RNG enable authentication and data encryption to protect against data leaks. Other security functions include Trusted Memory, a special area of the on-chip flash memory containing program code that is protected from unauthorized read access.
Features
- 32-bit RXv2 CPU core
- 240MHz operating frequency
- Capable of 480 DMIPS in operation at 240MHz
- Single precision 32-bit IEEE-754 floating-point
- Two types of multiply-and-accumulation unit between memories and between registers
- 32-bit multiplier (faster than ... instruction execution takes one CPU clock cycle)
- Divider (faster than ... instruction execution takes two CPU clock cycles)
- Fast interrupt
- CISC Harvard architecture with a 5-stage pipeline
- Variable-length instructions: Ultra-compact code
- Supports the memory protection unit (MPU)
- JTAG and FINE (one-line) debugging interfaces
- Low-power design and architecture
- Operation from a single 2.7V to 3.6V supply
- Low 0.2mA/MHz power consumption
- RTC is capable of operation from a dedicated power supply.
- Four low-power modes
- On-chip code flash memory
- Supports versions with up to 4 Mbytes of ROM
- No wait states at up to 120MHz or when the AFU is hit, one wait state at above 120MHz, and when the AFU is missed
- User code is programmable by on-board or off-board
- Programming/erasing as background operations (BGOs)
- On-chip data flash memory
- 64Kbytes, reprogrammable up to 100,000 times
- Programming/erasing as background operations (BGOs)
- On-chip SRAM
- 512Kbytes of SRAM (no wait states except in the 256Kbytes from 0004 0000h to 0007 FFFFh when ICLK is set to 120MHz or faster)
- 32Kbytes of RAM with ECC (single-error correction and double error detection)
- 8Kbytes of standby RAM (backup on deep software standby)
- Data transfer
- DMAC: 8 channels
- DTC
- EXDMAC: 2 channels
- DMAC for the Ethernet controller: 3 channels for 176- and 177-pin products; 2 channels for 100-, 144-, and 145-pin products
- Reset and supply management
- Power-on reset (POR
- Low voltage detection (LVD) with voltage settings
- Clock functions
- External crystal resonator or internal PLL for operation at 8 to 24MHz
- Internal 240kHz LOCO and HOCO selectable from 16, 18, and 20MHz
- 120kHz clock for the IWDTa
- Real-time clock
- Adjustment functions (30 seconds, leap year, and error)
- Real-time clock counting and binary counting modes are selectable
- Time capture function for capturing times in response to event-signal input
- IEC60730 compliance
- Oscillation-stoppage detection, frequency measurement, CRC, IWDTa, self-diagnostic function for the A/D converter, etc.
- Register write protection function can protect values in important registers against overwriting
- Independent watchdog timer
- 120kHz (1/2 LOCO frequency) clock operation
- Communications interfaces
- IEEE 1588-compliant Ethernet MAC for 176- and 177-pin products: 2 modules
- PHY layer for host/function or OTG controller (1) with high-speed USB 0 with battery charging transfer (only for 176- and 177-pin products)
- PHY layer (1) for host/function or OTG controller (1) with full-speed USB 0 transfer
- CAN (compliant with ISO11898-1), incorporating 32 mailboxes (up to 3 modules)
- SCIg and SCIh with multiple functionalities (up to 9)
- Choose from asynchronous mode, clock-synchronous mode, smart-card interface mode, simplified SPI, simplified I2C, and extended serial mode.
- SCIFA with 16-byte transmission and reception FIFOs (up to 4 interfaces)
- I2C bus interface for transfer at up to 1 Mbps (up to 2 interfaces)
- Four-wire QSPI (1 interface) in addition to RSPIa (2 interfaces)
- Parallel data capture unit (PDC) for the CMOS camera interface (not in 100-pin products)
- SD host interface (optional: 1 interface) with a 1- or 4-bit SD bus for use with SD memory or SDIO
- MMCIF with 1-, 4-, or 8-bit transfer bus width
- External address space
- Buses for full-speed data transfer (max. operating frequency of 60MHz)
- 8 CS areas
- 8-, 16-, or 32-bit bus space is selectable per area
- Independent SDRAM area (128 Mbytes)
- Up to 29 extended-function timers
- 16-bit TPUa, MTU3a, and GPTA: input capture, output compare, PWM waveform output
- 8-bit TMRa (4 channels), 16-bit CMT (4 channels), 32-bit CMTW (2 channels)
- 12-bit A/D converter
- Two 12-bit units (8 channels for unit 0; 21 channels for unit 1)
- Self-diagnosis
- Detection of analog input disconnection
- 12-bit D/A converter: 2 channels
- On-chip operational amplifier output or direct input selectable
- Temperature sensor for measuring temperature within the chip
- Encryption (optional)
- AES (key lengths: 128, 192, and 256 bits)
- DES (key lengths: 56 bits (DES); 3mm x 56 bits (T-DES))
- SHA (SHA-1 (128), SHA-2 (224 or 256), HMAC (160, 224, or 256))
- Up to 127 pins for general I/O ports
- 5V tolerance, open drain, input pull-up, switchable driving ability
- Operating temperature range
- -40°C to +85°C
- Package options
- PLQP0176KB-A 24mm x 24mm, 0.5mm pitch
- PLQP0144KA-A 20mm x 20mm, 0.5mm pitch
- PLQP0100KB-A 14mm x 14mm, 0.5mm pitch
- PTLG0177KA-A 8mm x 8mm, 0.5mm pitch
- PTLG0145KA-A 7mm x 7mm, 0.5mm pitch
- PTLG0100JA-A 7mm x 7mm, 0.65mm pitch
- PLBG0176GA-A 13mm x 13mm, 0.8mm pitch
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Block Diagram
Opublikowano: 2017-11-01
| Zaktualizowano: 2023-10-09