Lattice Semiconductor ECP2/M™ FPGAs
Lattice's ECP2™ and LatticeECP2M™ families of Field Programmable Gate Arrays (FPGAs) integrate high-performance FPGA features in a low-cost device. The ECP2 family features high-performance DSP blocks, up to 70K LUT capacity, support for DDR2 memory interfaces at 533Mbps, and up to 840Mbps generic LVDS performance. The ECP2M offers embedded SERDES, 100K LUT, and memory capacity up to 5.3Mbits.
Features
- High logic density for system integration
- Embedded SERDES (LatticeECP2M only)
- sysDSP™ block
- Flexible memory resources
- sysCLOCK analog PLLs and DLLs
- Pre-Engineered source synchronous I/O
- Programmable sysI/O™ buffer supports a wide range of interfaces
- Flexible device configuration
- Optional bitstream encryption (LatticeECP2/M “S” Versions Only)
- System-level support
Slice Diagram
Opublikowano: 2008-06-24
| Zaktualizowano: 2022-03-11