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Infineon Technologies EZ-USB™ FX2G3 High-Speed Peripheral Controllers

Infineon Technologies EZ-USB™ FX2G3 High-Speed Peripheral Controllers are USB 2.0 device controllers targeting the established USB 2.0 applications in biometrics, scanners, cameras, video, and imaging markets. Based on the MXS40-LP platform, these controllers feature Cortex®-M4 and M0+ MCUs, 512KB Flash, 128KB SRAM, 128KB ROM, serial communication blocks (SCB), and a crypto engine to support various security features. A high-bandwidth data subsystem in the Infineon EZ-USB FX2G3 enables DMA data transfers from an LVCMOS input to a USB output at up to 480 Mbps, supporting USB high-speed host systems. A 1024KB SRAM is included in the high-bandwidth data subsystem to buffer data.

Features

  • USB interface
    • USB 2.0 high-speed (HS) at 480Mbps
    • Up to 32 endpoints, 16 IN and 16 OUT, with each endpoint configured as Bulk, Isochronous, or Interrupt type
  • Dual-core CPU subsystem
    • 150MHz Arm® Cortex-M4F (CM4) CPU with single-cycle multiply, floating point (FP), and memory protection unit (MPU)
    • 100MHz Arm Cortex-M0+ (CM0+) CPU with single-cycle multiply and memory protection unit (MPU)
  • Memory subsystem
    • 512KB built-in application flash, read-while-write (RWW) support
    • 128KB SRAM with power and data retention control
    • 128KB ROM for device initialization, flash write, security, eFuse programming
    • 1MB SRAM for LVCMOS to USB data buffer
    • 1024 bits one-time programmable (OTP) eFuse array
  • Peripheral IO subsystem – total of 48 shared IOs
    • Quad SPI (QSPI) configurable as single, dual, quad, dual-quad, and octal interfaces
    • Six Serial Communication Blocks (SCBs) configurable as I2C, UART, or SPI
    • Pulse-density modulation (PDM) to pulse-code modulation (PCM) converter for a microphone
    • One USB full-speed (FS) device for the virtual communication (COM) function
    • GPIOs (each peripheral IO can be configured as a GPIO)
  • General Programmable Interface (GPIF III)
    • LVCMOS parallel-data bus transceiver mode
    • Consists of 16 data, one clock, and 10 control signals
    • 100MHz SDR in TX and RX mode
  • Ultra-low-power (ULP) with fine-grained power management
    • 1.7V to 3.6V operation range
    • Deep sleep mode with SRAM retention
  • Flexible clocking options
  • Security
    • ROM-based root of trust via uninterrupted Secure Boot
    • Stepwise authentication of execution images
    • Secured execution of code in the execute-only mode for protected routines
    • All debug and test ingress paths can be disabled
    • Eight protection contexts
    • Cryptography accelerator
      • Hardware acceleration for symmetric/asymmetric cryptographic methods and hash functions
      • True random number generation (TRNG) function
  • 8mm × 8mm 104-pin LGA package

Applications

  • Biometric devices
  • Scanners
  • Medical devices
  • Video streaming cameras
  • Audio devices
  • Industrial automation
  • Gaming controllers and AR/VR
  • Data acquisition systems
  • USB logic and protocol analyzers, JTAG debuggers
  • USB smartphone add-on accessories

Videos

Block Diagram

Block Diagram - Infineon Technologies EZ-USB™ FX2G3 High-Speed Peripheral Controllers

Development Tool

Infineon Technologies EZ-USB™ FX2G3 Development Kit (DVK)

This kit is designed to help users design and evaluate the EZ-USB™ FX2G3 peripheral controllers.

Learn Moreo Infineon Technologies EZ-USB™ FX2G3 Development Kit (DVK) View Productspowiązany z Infineon Technologies EZ-USB™ FX2G3 Development Kit (DVK)
Opublikowano: 2025-10-31 | Zaktualizowano: 2025-11-18