GSI Technology DDR SRAMs
GSI Technology SigmaDDR™ SRAMs are synchronous memories with a common read and write data bus that combines capacity and performance with transaction rates unequaled by competitors. SigmaDDR SRAMs "DDR" refers to the ability to transfer two beats of data on the data bus in a single clock cycle. SigmaDDR memories are ideal for applications that alternate between read and write operations infrequently, at operating speeds of 250 MHz and above. GSI's SigmaDDR devices are compatible with all competitor Double Data Rate SRAMs.
GSI Technology SigmaDDR-IIIe SRAMs are the Common I/O half of the SigmaQuad-IIIe/SigmaDDR-IIIe family of high-performance SRAMs. These third-generation devices are similar to GSI's second generation of networking SRAMs but offer several features that help enable significantly higher performance.
Features
- 8Mb x 36 and 16Mb x 18 organizations available
- 675MHz maximum operating frequency
- 675MT/s peak transaction rate (in millions per second)
- 48Gb/s peak data bandwidth (in x36 devices)
- Common I/O DDR data bus
- Non-multiplexed SDR address bus
- One operation - read or write - per clock cycle
- Burst of two read and write operations
- Three cycle read latency
- 1.3V nominal core voltage
- 1.2V, 1.3V, or 1.5V HSTL I/O interface
- Configurable ODT (on-die termination)
- ZQ pin for programmable driver impedance
- ZT pin for programmable ODT impedance
- IEEE 1149.1 JTAG-compliant boundary scan
- 260-pin, 14x22mm, 1mm ball pitch, 6/6 RoHS- compliant BGA package
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Opublikowano: 2016-11-09
| Zaktualizowano: 2022-03-11